The translation lookaside buffer is a small cache that sits on the CPU alongside the memory management unit and caches page table entries.
This saves a trip to memory that the MMU has to make to get a page table entry from the page table.
TLB just returns the page table entry and the MMU can directly look up the physical memory address. If it isn't there, then the MMU has to make the trip to memory for the page table, put the PTE into the TLB, and then look up the physical address.